Step-by-Step Tutorials¶
Welcome to the fsmc Hands-On Tutorial Series!
This series of progressive guides walks you through the entire lifecycle of designing, enriching, formally verifying, and integrating state machines using the fsmc universal compiler toolchain.
πΊοΈ Learning Path Progression¶
flowchart LR
Step1["1. First Statechart<br/>(Visual & Formal Models)"] --> Step2["2. EFSM & Datapath<br/>(Guards & Actions)"]
Step2 --> Step3["3. Hierarchical HFSM<br/>(Composite & History)"]
Step3 --> Step4["4. Formal Verification<br/>(LTL/CTL & RTM)"]
Step4 --> Step5["5. Codegen & Build<br/>(Generation Gap Pattern)"]
Tutorial Roadmap¶
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Step 1: Designing Your First State Machine Learn how to model states, triggers, and transitions using visual diagrams (PlantUML, Mermaid) and formal notations (SysML v2), and inspect how
fsmcparses them into a canonical Intermediate Representation (FsmIr). -
Step 2: Extended State Machines (EFSM), Guards & Datapath Enrich your statechart with context variables, boolean condition guards (
and,or,not), and deterministic state/transition action effects. -
Step 3: Hierarchical Statecharts (HFSM) & History Structure complex behavior with nested composite states, transition inheritance, shallow history (
[H]), and deep history ([H*]). -
Step 4: Formal Verification & Model Checking Mathematically prove system safety before generating code. Specify temporal logic formulas (LTL & CTL), run interval analysis, and generate requirement traceability matrices (RTM).
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Step 5: Code Generation & Build Integration Understand the non-destructive Generation Gap Pattern, compile your models into standalone or modular code, integrate seamlessly with CMake, and explore how
fsmc's target-agnostic design bridges models to diverse execution targets.
Let's begin with Step 1: Designing Your First State Machine!